CS302 Digital Logic Design Assignment No.2 Solution Spring Semester 2013

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CS302 Digital Logic Design Assignment No.2 Solution Spring Semester 2013


Question 1 [5Marks]

Using a karnaugh map, minimize the following SOP expression: (Show each step)

B’C’D’ + A’BC’D’ + ABC’D’ + BC’D + A’B’CD + AB’CD + A’B’CD’ + A’BCD’ + ABCD’ + AB’CD’


Question 2 [5Marks]

Convert the expression A’B + BC’ into standard SOP form and draw truth table for it. (Show each step)

Question 3 [5 Marks]
From the truth table given below, determine the equivalent standard POS expression. (Show each step)

A B C X
0 0 0 1
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 0
1 1 1 0