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CS501 Advance Computer Architecture Assignment No. 03 ( Non-Graded ) Fall 2014
#1
Due Date: 22nd January 2014

Question No. 1: Marks 10
Given below is a 2x1 Multiplexer having 2 input lines (D0 & D1), one select input (S) and one output line (Y).
IF S=0, then Y= D0
Else (S=1) Y= D1
Figure


.jpg   Untitled.jpg (Size: 6.87 KB / Downloads: 402)


hus, the output signal Y can be expressed as:
Y = S D0 + S D1
You are required to draw an 8x1 complete multiplexer with complete output signals.
There will be three selected inputs in 8x1 multiplexer, i-e S0, S1 and S2
Question No. 2: Marks 5
Consider an I/O bus that can transfer 4 bytes of data in one bus cycle. Suppose that a designer considers attaching the following two components:
Hard drive, with a transfer rate of 54 Mbytes/sec
Video card, with a transfer rate of 128 Mbytes/sec.
What might be the implications of both the cases in above scenario?
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