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CS501 Advance Computer Architecture Assignment No. 04 Solution Spring 2014
#1

CS501 Advance Computer Architecture Assignment No. 04 (Graded ) Solution and Discussion Spring 2014 Last Date Is 24th July 2014
Question 1:


3 + 3 = 6 Marks
Scenarios discussion:
What will be the order of “Interrupt Driven”, “DMA” and “Polling” if these two scenarios occur?
1. Lowest impact on processor utilization to a single I/O device
2. Lowest impact on processor utilization from a single I/O device.
Note: Explain within 3-5 lines. Otherwise answer will not be considered.

Question 2:
10 Marks
Record the integer according to the Booth Procedure
Integer = 781
Note: -1 equals to bar 1

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#2
[SIZE="4"]Booth Recoding
The Booth Algorithm makes multiplication simple to implement at hardware level and
speed up the procedure. This procedure is as follows:
1. Start with LSB and for each 0 of the original number, place a 0 in the recorded
number until a 1 in indicated.
2. Place a 1 for 1in the recorded table and skip any succeeding 1’s until a 0 is
encountered.
3. Place a 0 with 1 and repeat the procedure.[/SIZE]
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#3
CS501 Advance Computer Architecture Solved Quiz
Question # 1
Where does the processor store the address of the first instruction of the ISR?
Select correct option:
[COLOR="#FF0000"] =>Interrupt vector (p277)
[/COLOR] Interrupt request
Interrupt handler
All of the given options


Question # 2
In ________, a separate address space of the CPU is reserved for I/O operations.
Select correct option:
[COLOR="#FF0000"] =>Isolated I/O (p236)
[/COLOR] Memory Mapped I/O
All of above
None of above


Question # 3
-------------- is the time needed by the CPU to recognize (not service) an interrupt request.
Select correct option:
[COLOR="#FF0000"] =>Interrupt Latency (p279)
[/COLOR] Response Deadline
Timer delay
Throughput


Question # 4
_________ is a technique in which some of the CPU’s address lines forming an input to the address decoder are ignored.
Select correct option:
Microprogramming
Instruction pre-fetching
Pipelining
[COLOR="#FF0000"] =>Partial decoding (p255)
[/COLOR]

Question # 5
How can you define an interrupt?
Select correct option:
A process where an external device can speedup the working of the microprocessor
A process where memory can speed up programs execution speed
[COLOR="#FF0000"] =>A process where an external device can get the attention of the microprocessor (p198, 223, 273)
[/COLOR] A process where input devices can takeover the working of the microprocessor


Question # 6
An interface that can be used to connect the microcomputer bus to ________is called an I/O Port.
Select correct option:
Flip Flops
Memory
[COLOR="#FF0000"] =>Peripheral devices (p234)
[/COLOR] Multiplexers


Question # 7
Every time you press a key, an interrupt is generated. This is an example of
Select correct option:
[COLOR="#FF0000"][COLOR="#FF0000"] =>Hardware interrupt
[/COLOR][/COLOR] Software interrupt
All of the given
None of the given


Question # 8
Identify the following type of serial communication error condition: “The prior character that was received was not still read by the CPU and is over written by a new received character.”
Select correct option:
Framing error
Parity error
[COLOR="#FF0000"][COLOR="#00FF00"] =>Overrun error (p240)
[/COLOR][/COLOR] Under-run error


Question # 9
A software routine performed when an interrupt is received by the computer is called as ---------
Select correct option:
Interrupt
[COLOR="#FF0000"] =>Interrupt handler
[/COLOR] Exception
Trap


Question # 10
Which one of the following methods for resolving the priority makes use of individual bits of a priority encoder?
Select correct option:
Daisy-Chaining Priority
Asynchronous Priority
[COLOR="#FF0000"] =>Parallel Priority (p281)
[/COLOR] Semi-synchronous Priority

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