S501 Advance Computer Architecture Assignments No. 2 Solutions Fall 2014

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CS501 Advance Computer Architecture Assignments No. 2 December Fall 2014


Question No. 1 10 Marks


Given are the assembly language instructions for Falcon-A processor. Write behavioral RTL description for each of the given instructions.

Jpl r5, [20]
Mul r3, r2, r1
Div r5, r2, 6
Load r4, [r3 +9]
Shr r6, r3, 2




Question No. 2 10 Marks


Write assembly language instructions for Falcon-E processor to implement the given arithmetic expression.

C = ((5B + 4) ÷ 3) × 8A

[Vuhelper]

Follow this example for Question No. 2
z = 4(a +b) – 16(c+58) page 57 and 58 handouts
Solution A:
Notice that the
SRC does not have a multiply instruction.
multiplication with powers of 2 can be achieved by repeated shift left operations.
ld R1, c ; c is a label used for a memory location
addi R3, R1, 58 ; R3 contains (c+58)
shl R7, R3, 4 ; R7 contains 16(c+58)
ld R4, a
ld R5, b
add R6, R4, R5 ; R6 contains (a+b)
shl R8, R6, 2 ; R8 contains 4(a+b)
sub R9, R7, R8 ; the result is in R9
st R9, z ; store the result in memory location z
Assuming Multiply instruction
ld R1, c ; c is a label used for a memory location
addi R3, R1, 58 ; R3 contains (c+58)
mul R7, R3, 4 : R7 contains 16(c+58)
ld R4, a
ld R5, b
add R6, R4, R5 ; R6 contains (a+b)
mul R8, R6, 2 ; R8 contains 4(a+b)
sub R9, R7, R8 ; the result is in R9
st R9, z ; store the result in memory location z

[Vuhelper]

heck these handout examples and try to solve Question No.1
jpl (op-code= 16) In this instruction, the value contained in the register specified page 94
in the field ra is checked, and if it is positive, the jump is taken.
jpl r3, [label] (R[3]≥0): PC ← PC+ (label-PC);

mul r5, r7, r1 page-97
The RTL notation for this instruction will be
R[0] © R[5] ← R[7]*R[1]
4. div (op-code= 5) page-97
This instruction will divide the value of the register that is the second operand, by the
number in the register specified by the third operand, and assign the result to the
destination register.
div r4, r7, r2 R[4]←R[0] ©R[7]/R[2],R[0]←R[0] ©R[7]%R[2]

load (op-code= 29)
This instruction is to load a register from the memory. For instance, the
instruction
load r1, [r4 +15]
will add the constant 15 to the value stored in theregister r4, access the memory
location that corresponds to the number thus resulting, and assign the memory
contents of this location to the register r1; this is denoted in RTL by:
R[1] ← M[R[4]+15]